Research Article
Energy Efficient Dual Issue Embedded Processor
@ARTICLE{10.4108/eai.1-1-2016.150814, author={Hanni Lozano and Mabo Ito}, title={Energy Efficient Dual Issue Embedded Processor}, journal={EAI Endorsed Transactions on Industrial Networks and Intelligent Systems}, volume={3}, number={6}, publisher={EAI}, journal_a={INIS}, year={2016}, month={1}, keywords={embedded processor, energy efficiency}, doi={10.4108/eai.1-1-2016.150814} }
- Hanni Lozano
Mabo Ito
Year: 2016
Energy Efficient Dual Issue Embedded Processor
INIS
EAI
DOI: 10.4108/eai.1-1-2016.150814
Abstract
While energy efficiency is essential to extend the battery life of embedded devices, performance cannot be ignored. High performance superscalar embedded processors are more energy efficient than low performance scalar processors, however, they consume more power which is very limited in battery operated deeply embedded industrial devices. In this paper we propose an energy efficient dual issue embedded processor that can deliver up to 60% improvement in IPC (instructionper- cycle) performance with less than 20% increase in power consumption compared to a single issue scalar processor. In contrast to traditional multi-issue embedded processors that use power intensive superscalar techniques to extract instruction-level parallelism from applications, the proposed processor uses simple hardware techniques to resolve instruction scheduling conflicts. The processor is optimized for implementation on a low cost FPGA which makes it a suitable candidate for cost sensitive embedded industrial applications.
Copyright © 2016 M. Ito and H. Lozano, licensed to EAI. This is an open access article distributed under the terms of the Creative Commons Attribution licence (http://creativecommons.org/licenses/by/3.0/), which permits unlimited use, distribution and reproduction in any medium so long as the original work is properly cited.