inis 16(6): e4

Research Article

Energy Efficient Dual Issue Embedded Processor

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  • @ARTICLE{10.4108/eai.1-1-2016.150814,
        author={Hanni  Lozano and Mabo  Ito},
        title={Energy Efficient Dual Issue Embedded Processor},
        journal={EAI Endorsed Transactions on Industrial Networks and Intelligent Systems},
        volume={3},
        number={6},
        publisher={EAI},
        journal_a={INIS},
        year={2016},
        month={1},
        keywords={embedded processor, energy efficiency},
        doi={10.4108/eai.1-1-2016.150814}
    }
    
  • Hanni Lozano
    Mabo Ito
    Year: 2016
    Energy Efficient Dual Issue Embedded Processor
    INIS
    EAI
    DOI: 10.4108/eai.1-1-2016.150814
Hanni Lozano1, Mabo Ito1,*
  • 1: University of British Columbia, Vancouver, Canada
*Contact email: mito@ece.ubc.ca

Abstract

While energy efficiency is essential to extend the battery life of embedded devices, performance cannot be ignored. High performance superscalar embedded processors are more energy efficient than low performance scalar processors, however, they consume more power which is very limited in battery operated deeply embedded industrial devices. In this paper we propose an energy efficient dual issue embedded processor that can deliver up to 60% improvement in IPC (instructionper- cycle) performance with less than 20% increase in power consumption compared to a single issue scalar processor. In contrast to traditional multi-issue embedded processors that use power intensive superscalar techniques to extract instruction-level parallelism from applications, the proposed processor uses simple hardware techniques to resolve instruction scheduling conflicts. The processor is optimized for implementation on a low cost FPGA which makes it a suitable candidate for cost sensitive embedded industrial applications.