Research Article
Efficient LDPC Code Design based on Genetic Algorithm for IoT Applications
@ARTICLE{10.4108/eetinis.v11i4.5843, author={Thanh-Loc Nguyen-Van and Tan Do Duy and Thien Huynh-The}, title={Efficient LDPC Code Design based on Genetic Algorithm for IoT Applications}, journal={EAI Endorsed Transactions on Industrial Networks and Intelligent Systems}, volume={11}, number={4}, publisher={EAI}, journal_a={INIS}, year={2024}, month={8}, keywords={LDPC, genetic algorithm, short block length, Internet of Things}, doi={10.4108/eetinis.v11i4.5843} }- Thanh-Loc Nguyen-Van
Tan Do Duy
Thien Huynh-The
Year: 2024
Efficient LDPC Code Design based on Genetic Algorithm for IoT Applications
INIS
EAI
DOI: 10.4108/eetinis.v11i4.5843
Abstract
In this paper, we propose a low-density parity check (LDPC) code design scheme that improves the performance of the existing genetic algorithm-based LDPC scheme. In particular, we enhance the performance of the LDPC code by removing the girth-4 property of the parity check matrix and utilizing the min-sum decoding algorithm instead of the belief propagation decoding algorithm. In addition, we consider different short block-length scenarios, including 64-bit and 128-bit block length. Then, we evaluate the block error rate (BLER) of the LDPC code over the binary input additive white Gaussian noise (BI-AWGN) channel. Finally, extensive simulation results indicate that our proposed approach achieves more than 11% gain in terms of BLER compared with the benchmarked schemes.
Copyright © 2024 Nguyen-Van et al., licensed to EAI. This is an open access article distributed under the terms of the CC BY-NC-SA 4.0, which permits copying, redistributing, remixing, transformation, and building upon the material in any medium so long as the original work is properly cited.