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Proceedings of the 3rd International Conference on Mechanics, Electronics Engineering and Automation, ICMEEA 2026, April 24-26, 2026, Singapore, Singapore

Research Article

Load Evolution and Gain/Linearity Trade-off Mechanisms in High-Performance Single-Stage Amplifiers

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  • @INPROCEEDINGS{10.4108/eai.24-4-2026.2364981,
        author={Yuxiang  Sun},
        title={Load Evolution and Gain/Linearity Trade-off Mechanisms in High-Performance Single-Stage Amplifiers},
        proceedings={Proceedings of the 3rd International Conference on Mechanics, Electronics Engineering and Automation, ICMEEA 2026, April 24-26, 2026, Singapore, Singapore},
        publisher={EAI},
        proceedings_a={ICMEEA},
        year={2026},
        month={9},
        keywords={Analog front end Low-voltage design Current reuse Source degeneration Linearization techniques},
        doi={10.4108/eai.24-4-2026.2364981}
    }
    
  • Yuxiang Sun
    Year: 2026
    Load Evolution and Gain/Linearity Trade-off Mechanisms in High-Performance Single-Stage Amplifiers
    ICMEEA
    EAI
    DOI: 10.4108/eai.24-4-2026.2364981
Yuxiang Sun1,*
  • 1: Bangor College, Central South University of Forestry and Technology, Changsha City, 410004, China
*Contact email: 1535099539@qq.com

Abstract

This article systematically reviews the development path of high-performance single-stage amplifiers under low-voltage constraints. First, leveraging the superposition principle and physical equivalent models, this paper clarifies the physical mechanisms of circuit nonlinearity and the physical connotation of impedance characteristics. Subsequently, it systematically discusses the evolutionary logic of load techniques: it analyzes the “gain–swing deadlock” caused by traditional resistive loads, examines how active loads realize impedance decoupling, and further derives inverter-based current-reuse architectures. In response to the recent demand for ultra-low-power design, it focuses on application strategies of inverter-based structures at 0.3 V ultra-low supply voltage and in the subthreshold region. This paper further investigates linearization techniques centered on source degeneration and comparatively studies the trade-off between resistive degeneration and active degeneration in terms of noise characteristics and area efficiency. The survey indicates that combining inverter-based current-reuse topologies with active linearization techniques is a key trend for future high-energy-efficiency.

Keywords
Analog front end, Low-voltage design, Current reuse, Source degeneration, Linearization techniques
Published
2026-09-02
Publisher
EAI
http://dx.doi.org/10.4108/eai.24-4-2026.2364981
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