ew 19(24): e6

Research Article

Ensuring minimum duration of transient processes in switched voltage regulators with digital control

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  • @ARTICLE{10.4108/eai.16-10-2019.160838,
        author={Oleg  V.  Nepomnyashchiy and Yuri  V.  Krasnobaev and Aleksey  P.  Yablonsky and Vyacheslav  V.  Potekhin and Natalia  J.  Sirotinina},
        title={Ensuring minimum duration of transient processes in switched voltage regulators with digital control},
        journal={EAI Endorsed Transactions on Energy Web},
        volume={6},
        number={24},
        publisher={EAI},
        journal_a={EW},
        year={2019},
        month={10},
        keywords={switching voltage regulator, SVR, control law, transient time, adjustable components of state variables, digital control loop, field-programmable gate array, FPGA},
        doi={10.4108/eai.16-10-2019.160838}
    }
    
  • Oleg V. Nepomnyashchiy
    Yuri V. Krasnobaev
    Aleksey P. Yablonsky
    Vyacheslav V. Potekhin
    Natalia J. Sirotinina
    Year: 2019
    Ensuring minimum duration of transient processes in switched voltage regulators with digital control
    EW
    EAI
    DOI: 10.4108/eai.16-10-2019.160838
Oleg V. Nepomnyashchiy1,*, Yuri V. Krasnobaev1, Aleksey P. Yablonsky1, Vyacheslav V. Potekhin2, Natalia J. Sirotinina1
  • 1: School of Space and Information Technologies, Siberian Federal University, Svobodny pr. 79, 660041, Krasnoyarsk, Russia
  • 2: Higher School Cyber-Physical and Control Systems, Peter the Great St. Petersburg Polytechnic University, Grazhdansky Pr. 28, 195220, St. Petersburg, Russia
*Contact email: 2955005@gmail.com

Abstract

This paper describes a solution suggested to minimize the finite transient duration of a switched voltage regulator (SVR) for step changes in load current. SVR control laws aimed at minimizing the transient time are synthesized, and the microprocessor-based architecture and operating algorithms of the control system are designed. The prototype of the SVR digital control unit is implemented on the field-programmable gate array integrated circuit Cyclone III EP3C120F780 using the NIOS II soft-processor core. Embedded software is developed to calculate the control pulse duration for power switches in accordance with the synthesized control laws taking into account the feedback loop signal. A case study of the prototype shows that it provides the duration of transients caused by a load current step change, equal to 3-4 conversion periods at the frequency of 120 kHz. It confirms the suitability of the developed models, algorithms and control laws for ensuring the minimum transient duration.