cs 20(17): e2

Research Article

Automated RTL Generator for Optimized Flop Repeater Network

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  • @ARTICLE{10.4108/eai.13-7-2018.162634,
        author={Rahul S Bhatt and Shweta Sharma and Shyam A},
        title={Automated RTL Generator for Optimized Flop Repeater Network},
        journal={EAI Endorsed Transactions on Cloud Systems},
        keywords={Optimized repeater flop structure, Repeater, Flop, Automated RTL, SREP/TREE, Logic design},
  • Rahul S Bhatt
    Shweta Sharma
    Shyam A
    Year: 2020
    Automated RTL Generator for Optimized Flop Repeater Network
    DOI: 10.4108/eai.13-7-2018.162634
Rahul S Bhatt1,*, Shweta Sharma1, Shyam A1
  • 1: Intel Technologies India Pvt Ltd, Bangalore, India
*Contact email: rahul.s.bhatt@intel.com


In all Hard IP (HIP) designs, there is a need for signals to travel from its source to destination module. To meet timing, they are flop repeated based on the floorplan of the design. Different signals have unique repetition requirements based on their functionality/timing criticality. Also signals may have single destination or multiple destinations. The flop repeater structure for each signal should be optimized so that it has minimum number of flops and timing is also met, to achieve desired targets for timing, area and power. This paper will show how we are creating optimized tree structure based on mathematical techniques and generating automated RTL for such repeater flop module. This submission presents a new tool ART (Auto Repeater Tool) that completely eliminates the manual effort/time required to generate functional, ready to plug-in RTL.