ew 19(23): e6

Research Article

Smart Grid Security with Cryptographic Chip Integration

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  • @ARTICLE{10.4108/eai.13-7-2018.157037,
        author={Adesh Kumar and Priyanshi Vishnoi and Shimi S. L.},
        title={Smart Grid Security with Cryptographic Chip Integration},
        journal={EAI Endorsed Transactions on Energy Web},
        keywords={Smart grid security, Cryptographic Encryption and Decryption, FPGA synthesis, TACIT algorithm},
  • Adesh Kumar
    Priyanshi Vishnoi
    Shimi S. L.
    Year: 2019
    Smart Grid Security with Cryptographic Chip Integration
    DOI: 10.4108/eai.13-7-2018.157037
Adesh Kumar1,*, Priyanshi Vishnoi2, Shimi S. L.2
  • 1: Department of Electrical & Electronics Engineering, School of Engineering, University of Petroleum and Energy Studies (UPES), Dehradun, India
  • 2: Department of Electrical Engineering, National Institute of Technical Teachers Training and Research (NITTTR) Chandigarh, India
*Contact email: adeshmanav@gmail.com


Smart grid is the modern digital electricity delivery system based on duplex communication between electrical grid and consumers. The smart grid includes several operations and energy measures comprising renewable energy sources, smart meters, smart devices, and energy efficient resources. The presence of all smart and efficient components on the smart grid involves the Information and Communication Technology (ICT) layer in order to meet the requirements of grid monitoring, control and information interchange for smooth operation of grid. The duplex communication flows conveys cyber security concerns to the smart grid. It is required to countermeasures different cyber security algorithms to the heterogeneous smart grid based on computational resources availability, confidentiality and integrity. The paper proposed the cryptographic based encryption and decryption approach could be employed in smart grid distribution system hardware. A new TACIT algorithm hardware chip is proposed for secured grid communication. The chip design is carried in Xilinx ISE 14.2 software and verified on SPARTAN-3E FPGA hardware. The functional simulation is also done for 64 bit and 128-bit key size on Modelsim 10.0 software. The hardware parameters, memory and timing parameters are extracted directly form Xilinx Software and compared with the existing security protocols. The projected research work will be the advantage for the power industries working on the concerns about the integration of smart grid security concerns with FPGA based systems.