Modeling software transactional memory with AnyLogic

Armin  Heindl; Gilles  Pokam

2nd International ICST Conference on Simulation Tools and Techniques

Research Article

Modeling software transactional memory with AnyLogic

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Cite: BibTeX Plain Text

@INPROCEEDINGS{10.4108/ICST.SIMUTOOLS2009.5581,
    author={Armin  Heindl and Gilles  Pokam},
    title={Modeling software transactional memory with AnyLogic},
    proceedings={2nd International ICST Conference on Simulation Tools and Techniques},
    publisher={ICST},
    proceedings_a={SIMUTOOLS},
    year={2010},
    month={5},
    keywords={},
    doi={10.4108/ICST.SIMUTOOLS2009.5581}
}

Armin Heindl
Gilles Pokam
Year: 2010
Modeling software transactional memory with AnyLogic
SIMUTOOLS
ICST
DOI: 10.4108/ICST.SIMUTOOLS2009.5581

Armin Heindl¹^,*, Gilles Pokam²^,*

1: Department of Computer Science, University of Erlangen-Nuremberg, Erlangen, Germany.
2: Microprocessor Technology Lab, Intel Corporation, Santa Clara, CA, USA.

*Contact email: Armin.Heindl@informatik.uni-erlangen.de, gilles.a.pokam@intel.com

Abstract

A flexible simulation model is presented to study different variants of software transactional memory (STM), like pessimistic STM or optimistic STM either with inplace memory updates or write buffering.

The dynamic behavior of transactions is encoded in timed statecharts as provided by the simulation tool AnyLogic in its implementation of real-time UML. Their graphical representation helps to convey the key design issues of the simulation model within this publication. Statistically significant numeric results for varying parameters, like number of threads, number of transactional operations, number of transactional data objects, are obtained efficiently as part of a Parameter Variation Experiment.

Published: 2010-05-16
Publisher: ICST

: http://dx.doi.org/10.4108/ICST.SIMUTOOLS2009.5581

Modeling software transactional memory with AnyLogic

Abstract

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