Optimizing Dielectric Strip Plasmonic Waveguides for Subwavelength On-Chip Optical Communication

In this paper, we develop an efficient method for optimizing the geometry of dielectric strip plasmonic waveguides for subwavelength on-chip optical communication in future nanoscale integrated circuits. Leveraging an efficient finite-difference field solver, we demonstrate that a dielectric strip embedded in a metallic medium can support single mode propagation while simultaneously achieving low loss and high light confinement. We then formulate the optimization problem for both mono-mode and general dielectric strip waveguides, which we solve using nonlinear constrained optimization. The results indicate that the method can locate optimal dielectric strip waveguide designs with significantly fewer model evaluations than enumerating over the complete design spaceIn this paper, we develop an efficient method for optimizing the geometry of dielectric strip plasmonic waveguides for subwavelength on-chip optical communication in future nanoscale integrated circuits. Leveraging an efficient finite-difference field solver, we demonstrate that a dielectric strip embedded in a metallic medium can support single mode propagation while simultaneously achieving low loss and high light confinement. We then formulate the optimization problem for both mono-mode and general dielectric strip waveguides, which we solve using nonlinear constrained optimization. The results indicate that the method can locate optimal dielectric strip waveguide designs with significantly fewer model evaluations than enumerating over the complete design space