Research Article

3D on-chip networking technology based on post-silicon devices for future networks-on-chip

• @INPROCEEDINGS{10.1109/NANONET.2006.346233,
      author={ S.  Fujita and K. Nomura and K. Abe and T.H.  Lee},
      title={3D on-chip networking technology based on post-silicon devices for future networks-on-chip},
      proceedings={1st International ICST Conference on Nano-Networks},
      publisher={IEEE},
      proceedings_a={NANO-NET},
      year={2007},
      month={4},
      keywords={},
      doi={10.1109/NANONET.2006.346233}
  }
  

• S. Fujita
  K. Nomura
  K. Abe
  T.H. Lee
  Year: 2007
  3D on-chip networking technology based on post-silicon devices for future networks-on-chip
  NANO-NET
  IEEE
  DOI: 10.1109/NANONET.2006.346233