Sixth International Conference on Simulation Tools and Techniques

Research Article

HYBRID AND MULTICORE OPTIMIZED ARCHITECTURES FOR TEST AND SIMULATION SYSTEMS

  • @INPROCEEDINGS{10.4108/icst.simutools.2013.251759,
        author={Rabie Ben Atitallah and George Afonso and Nicolas Belanger and Martial Rubio and Nicolas Damiani},
        title={HYBRID AND MULTICORE OPTIMIZED ARCHITECTURES FOR TEST AND SIMULATION SYSTEMS},
        proceedings={Sixth International Conference on Simulation Tools and Techniques},
        publisher={ICST},
        proceedings_a={SIMUTOOLS},
        year={2013},
        month={7},
        keywords={fpga heterogeneous architecture test simulation avionic},
        doi={10.4108/icst.simutools.2013.251759}
    }
    
  • Rabie Ben Atitallah
    George Afonso
    Nicolas Belanger
    Martial Rubio
    Nicolas Damiani
    Year: 2013
    HYBRID AND MULTICORE OPTIMIZED ARCHITECTURES FOR TEST AND SIMULATION SYSTEMS
    SIMUTOOLS
    ACM
    DOI: 10.4108/icst.simutools.2013.251759
Rabie Ben Atitallah,*, George Afonso1, Nicolas Belanger2, Martial Rubio2, Nicolas Damiani2
  • 1: EADS Innovation Works - INRIA Lille Nord Europe
  • 2: Eurocopter
*Contact email: rabie.ben-atitallah@lifl.fr

Abstract

Continuously growing aerospace industry competitiveness pushes avionic actors to revisit and strengthen their Verification & Validation (V&V) lifecycle related means. In this perspective, the areas of Test and Simulation (T&S) systems are now an unavoidable convergence path. Yesterday considered as different expertise fields, T&S should rely on common frameworks in the future supported by cutting-edge architectures. In the first part, the paper introduces the current main changes of Eurocopter’s V&V process. Then we present the RISE simulation tool used in different applications fields such as Training Media, investigation studies and rapid prototyping. We highlight RISE multi-threading management capabilities and its associated simulation benefits. Capitalizing on simulation state-of-the-art, we introduce the new research project CHARTS. In order to meet performance, power and flexibility goals requested by T&S systems, this project proposes a challenging and a scalable hybrid architecture based on a multi-core processor tightly-connected to FPGA.