2nd Internationa ICST Conference on Nano-Networks

Research Article

A Topology Design Customization Approach for STNoC

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  • @INPROCEEDINGS{10.4108/ICST.NANONET2007.2000,
        author={Gianluca Palermo and Giovanni Mariani and Cristina Silvano and Riccardo Locatelli and Marcello  Coppola},
        title={A Topology Design Customization Approach for STNoC},
        proceedings={2nd Internationa ICST Conference on Nano-Networks},
        proceedings_a={NANO-NET},
        year={2010},
        month={5},
        keywords={},
        doi={10.4108/ICST.NANONET2007.2000}
    }
    
  • Gianluca Palermo
    Giovanni Mariani
    Cristina Silvano
    Riccardo Locatelli
    Marcello Coppola
    Year: 2010
    A Topology Design Customization Approach for STNoC
    NANO-NET
    ICST
    DOI: 10.4108/ICST.NANONET2007.2000
Gianluca Palermo1,2,*, Giovanni Mariani2,*, Cristina Silvano1,*, Riccardo Locatelli3,*, Marcello Coppola3,*
  • 1: Politecnico di Milano - Dipartimento di Elettronica e Informazione
  • 2: ALaRI - Faculty of Informatics - University of Lugano
  • 3: STMicroelectronics - Advanced System Technology
*Contact email: gpalermo@elet.polimi.it, giovanni.mariani@lu.unisi.ch, silvano@elet.polimi.it, riccardo.locatelli@st.com, marcello.coppola@st.com

Abstract

To support high bandwidth SoCs, a communication design flow is necessary for the design space exploration respecting tight design requirements. In order to exploit the benefits introduced by the NoC approach for the on-chip communication, the paper presents a design flow for the core mapping and customization of the network topology applied to STNoC, the Network on-Chip developed by STMicroelectronics. Starting from ring topology, the proposed application-specific flow tries to find a set of customized topologies, optimized in terms of performance and area/energy overhead, by adding links. The generated STNoC custom topologies provide a reduced cost with respect to the spidergon topology.