Research Article
Implementation of Floating Point Cordic Coprocessor
@INPROCEEDINGS{10.4108/eai.7-12-2021.2314974, author={Radhakrishnan K R}, title={Implementation of Floating Point Cordic Coprocessor}, proceedings={Proceedings of the First International Conference on Combinatorial and Optimization, ICCAP 2021, December 7-8 2021, Chennai, India}, publisher={EAI}, proceedings_a={ICCAP}, year={2021}, month={12}, keywords={coordinate rotation digital computer(cordic) fixed point floating point}, doi={10.4108/eai.7-12-2021.2314974} }- Radhakrishnan K R
Year: 2021
Implementation of Floating Point Cordic Coprocessor
ICCAP
EAI
DOI: 10.4108/eai.7-12-2021.2314974
Abstract
For real time applications like navigation, microprocessors are not fast enough but with the use of CORDIC, computation becomes faster. CORDIC is basically shift and add algorithm. The concept of a floating point The CORDIC coprocessor is designed to receive inputs in the IEEE 754 single precision format. Preprocessor converts these inputs into 32 bit fixed point representation. The CORDIC works for circular, linear, or hyperbolic systems in rotation or vectoring modes. A postprocessor converts the CORDIC module's output into the IEEE 754 format. Latency and area required for different CORDIC are analysed. According to the results, hyperbolic has the longest path delay and circular has the shortest, linear has the most LUT and register consumption, while Hyperbolic has the least. The use of shift-registers and adders instead of multipliers is the core premise of CORDIC, which saves a lot of hardware resources. Modified CORDIC with microrotations has less path delay when compared with the existing circular CORDIC.