sas 16(5): e1

Research Article

A Self-Organizing Map Architecture for Arm Reaching Based on Limit Cycle Attractors

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  • @ARTICLE{10.4108/eai.3-12-2015.2262421,
        author={Di-Wei Huang and Rodolphe Gentili and James Reggia},
        title={A Self-Organizing Map Architecture for Arm Reaching Based on Limit Cycle Attractors},
        journal={EAI Endorsed Transactions on Self-Adaptive Systems},
        volume={2},
        number={5},
        publisher={ACM},
        journal_a={SAS},
        year={2016},
        month={5},
        keywords={self-organizing maps, limit cycle attractors, multi-som architecture, neural oscillation, open-loop motor control, arm movements},
        doi={10.4108/eai.3-12-2015.2262421}
    }
    
  • Di-Wei Huang
    Rodolphe Gentili
    James Reggia
    Year: 2016
    A Self-Organizing Map Architecture for Arm Reaching Based on Limit Cycle Attractors
    SAS
    EAI
    DOI: 10.4108/eai.3-12-2015.2262421
Di-Wei Huang1,*, Rodolphe Gentili2, James Reggia3
  • 1: Dept. of Computer Science, University of Maryland, College Park
  • 2: Dept. of Kinesiology & NACS, University of Maryland, College Park
  • 3: Dept. of Computer Science & UMIACS, University of Maryland, College Park
*Contact email: dwh@cs.umd.edu

Abstract

Creating and studying neurocognitive architectures is an active and increasing focus of research efforts. Based on our recent research that uses neural activity limit cycles in self-organizing maps (SOMs) to represent external stimuli, this study explores the use of such limit cycle attractors in a neurocognitive architecture for an open-loop arm reaching task. The goal is to learn to produce a static motor command for arm joints that moves the manipulator to a target spatial location, while the internal neural activity remains oscillatory. Unlike with static SOMs, stabilizing output based on changing neural activity becomes an important issue. Our architecture is also characterized by simple and forgiving timing requirements, meaning that the time of gating among neural components can be set relatively arbitrarily due to the repetitiveness of limit cycle activity. The results indicate that our architecture generalizes to unseen data, and that the overall performance is insensitive to exact gate timing.