Research Article
FPGA Implementation of Elliptic Curve Cryptoprocessor for Perceptual Layer of the Internet of Things
@ARTICLE{10.4108/eai.15-10-2018.155739, author={V. Kamalakannan and S. Tamilselvan}, title={FPGA Implementation of Elliptic Curve Cryptoprocessor for Perceptual Layer of the Internet of Things}, journal={EAI Endorsed Transactions on Security and Safety}, volume={5}, number={15}, publisher={EAI}, journal_a={SESA}, year={2018}, month={10}, keywords={Internet of Things, Perceptual layer, Wireless Sensor Network, Elliptical Curve Cryptography, Elliptic Curve Digital Signature Algorithm}, doi={10.4108/eai.15-10-2018.155739} }
- V. Kamalakannan
S. Tamilselvan
Year: 2018
FPGA Implementation of Elliptic Curve Cryptoprocessor for Perceptual Layer of the Internet of Things
SESA
EAI
DOI: 10.4108/eai.15-10-2018.155739
Abstract
Today’s developing era data and information security plays an important role in unsecured communication between Internet of Things (IoT) elements. In IoT, data are transmitted in plaintext for many reasons. One of the most common reason is the availability of hardware. Many IoT products are inexpensive components with limited memory and computational resources. Such devices might be unable to support the computationally intense cryptographic functions of asymmetrical cryptography. If designers considered the privacy implications of unencrypted data, they have limited options for encryption because of the hardware platform. Therefore the designers have to create their own security protocols or implement stripped-down versions of existing security protocols. The second option has a better chances. Evidence recommends such a modified protocol would run efficiently on small devices. Elliptic Curve Cryptography (ECC) is used to ensure complete protection against the security risks such as confidentiality, integrity, privacy and authentication by implementing an Elliptic Curve Cryptoprocessor. The work focuses on high-performance Elliptic Curve Cryptoprocessor design, optimized for Field Programmable Gate Array (FPGA) implementation, using the concept of asymmetric and hash algorithms. A novel cryptographic algorithm consisting of matrix mapping methodology and hidden generator point theory is to be applied for encryption/decryption between the sender and receiver whereas Elliptic Curve Digital Signature Algorithm (ECDSA) designed using Keccak Secured Hash Algorithm (SHA) algorithm is applied for the validation of the encrypted data. The proposed Cryptoprocessor operates at a minimum period of 6.980 ns and maximum frequency of 143.276 MHz. This work focuses on the practicability of public key cryptography implementation for devices connected in the perceptual layer of IoT.
Copyright © 2018 V.Kamalakannan et al., licensed to EAI. This is an open access article distributed under the terms of the Creative Commons Attribution licence (http://creativecommons.org/licenses/by/3.0/), which permits unlimited use, distribution and reproduction in any medium so long as the original work is properly cited.