Research Article
FPGA design of fixed-complexity high-throughput MIMO detector based on QRDM algorithm
@INPROCEEDINGS{10.4108/chinacom.2010.69, author={Xiang Wu and John S. Thompson}, title={FPGA design of fixed-complexity high-throughput MIMO detector based on QRDM algorithm}, proceedings={5th International ICST Conference on Communications and Networking in China}, publisher={IEEE}, proceedings_a={CHINACOM}, year={2011}, month={1}, keywords={QRDM MMSE FPGA merge-sort winner path expansion}, doi={10.4108/chinacom.2010.69} }- Xiang Wu
John S. Thompson
Year: 2011
FPGA design of fixed-complexity high-throughput MIMO detector based on QRDM algorithm
CHINACOM
ICST
DOI: 10.4108/chinacom.2010.69
Abstract
This paper presents a field-programmable gate array (FPGA) implementation of an unbiased minimum mean square error (MMSE) metric based QR-decomposition M (QRDM) algorithm for the multiple-input multiple-output (MIMO) systems. Two advanced techniques, namely the merge-sort (MS) based and winner path expansion (WPE) based sorting schemes have been implemented and validated on an FPGA platform for a 4×4 16-QAM MIMO system. The results show that the MS-QRDM is advantageous in the simplified control circuits and leads to less logic resource use, whereas the WPE-QRDM is able to achieve the minimum use of the computational units and results in fewer multipliers. Furthermore, it also shows that both schemes can support up to 1.6 Gbps decoding throughput when they are implemented in a fully pipelined parallel architecture.
