Optimum Hardware-Architecture for Modular Divider in GF(2) with Chaos as Arbitrary Source Based on ECC

Azar Hosseini; Abolfazl Falahati

Global Security, Safety and Sustainability & e-Democracy. 7th International and 4th e-Democracy, Joint Conferences, ICGS3/e-Democracy 2011, Thessaloniki, Greece, August 24-26, 2011, Revised Selected Papers

Research Article

Optimum Hardware-Architecture for Modular Divider in GF(2) with Chaos as Arbitrary Source Based on ECC

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@INPROCEEDINGS{10.1007/978-3-642-33448-1_33,
    author={Azar Hosseini and Abolfazl Falahati},
    title={Optimum Hardware-Architecture for Modular Divider in GF(2) with Chaos as Arbitrary Source Based on ECC},
    proceedings={Global Security, Safety and Sustainability \& e-Democracy. 7th International and 4th e-Democracy, Joint Conferences, ICGS3/e-Democracy 2011, Thessaloniki, Greece, August 24-26, 2011, Revised Selected Papers},
    proceedings_a={ICGS3 \& E-DEMOCRACY},
    year={2012},
    month={10},
    keywords={ECC Chaos source Proposed Divider FPGA MC-DS-CDMA},
    doi={10.1007/978-3-642-33448-1_33}
}

Azar Hosseini
Abolfazl Falahati
Year: 2012
Optimum Hardware-Architecture for Modular Divider in GF(2) with Chaos as Arbitrary Source Based on ECC
ICGS3 & E-DEMOCRACY
Springer
DOI: 10.1007/978-3-642-33448-1_33

Azar Hosseini¹^,*, Abolfazl Falahati¹^,*

1: Iran University of Science and Technology

*Contact email: ahosseini@elec.iust.ac.ir, afalahati@iust.ac.ir

Abstract

The large-scale proliferation of wireless communications both inside and outside the home-office environment has led to an increased demand for effective and cheap encryption schemes. Now a new chaos based signals as arbitrary source and digital signals as main source make digits for Elliptic curve algorithm by 2 parallel-in (with pipelining), 1parallel-out and 1 serial-out to produce encrypted signals. For computing this scheme in application on MC-DS-CDMA transmitter and receiver, new algorithm of division with the least time consumption, is presented.

Keywords: ECC Chaos source Proposed Divider FPGA MC-DS-CDMA

Published: 2012-10-08

: http://dx.doi.org/10.1007/978-3-642-33448-1_33