AccessNets. Third International Conference on Access Networks, AccessNets 2008, Las Vegas, NV, USA, October 15-17, 2008. Revised Papers

Research Article

Fragmentation in a Novel Implementation of Slotted GPON Segmentation and Reassembly

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  • @INPROCEEDINGS{10.1007/978-3-642-04648-3_18,
        author={Yixuan Qin and Martin Reed and Zheng Lu and David Hunter and Albert Rafel and Justin Kang},
        title={Fragmentation in a Novel Implementation of Slotted GPON Segmentation and Reassembly},
        proceedings={AccessNets. Third International Conference on Access Networks, AccessNets 2008, Las Vegas, NV, USA, October 15-17, 2008. Revised Papers},
        proceedings_a={ACCESSNETS},
        year={2012},
        month={5},
        keywords={GPON FPGA SAR fragmentation pipeline parallelism emulator},
        doi={10.1007/978-3-642-04648-3_18}
    }
    
  • Yixuan Qin
    Martin Reed
    Zheng Lu
    David Hunter
    Albert Rafel
    Justin Kang
    Year: 2012
    Fragmentation in a Novel Implementation of Slotted GPON Segmentation and Reassembly
    ACCESSNETS
    Springer
    DOI: 10.1007/978-3-642-04648-3_18
Yixuan Qin1,*, Martin Reed1,*, Zheng Lu1,*, David Hunter1,*, Albert Rafel2,*, Justin Kang2,*
  • 1: University of Essex
  • 2: BT
*Contact email: yqin@essex.ac.uk, mjreed@essex.ac.uk, zlu@essex.ac.uk, dkhunter@essex.ac.uk, albert.2.rafel@bt.com, justin.kang@bt.com

Abstract

Gigabit passive optical network (GPON) is likely to play an important role in future access networks and the current challenge is to increase the existing GPON bit-rate to 10 Gb/s to provide next generation access (NGA). However, implementing this in a cost-effective manner is difficult and an important research topic. One of the difficulties in implementation for the electronic part of high-speed GPON is the fragmentation feature as it requires multiple pipeline paths. This paper proposes a novel segmentation and reassembly (SAR) scheme, which simplifies the implementation of fragmentation in that it employs fewer FPGA resources and allows a faster hardware clock rate. Analysis confirms that the scheme does not suffer from reduced efficiency in a variety of conditions. It is also backward compatible and suitable for current 1.25 Gb/s and 2.5 Gb/s GPONs. The novel SAR is verified by both a hardware GPON emulator and a software OPNET simulation.