Nano-Net. Third International ICST Conference, NanoNet 2008, Boston, MA, USA, September 14-16, 2008, Revised Selected Papers

Research Article

Structural Fault Modelling in Nano Devices

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  • @INPROCEEDINGS{10.1007/978-3-642-02427-6_2,
        author={Manoj Gaur and Raghavendra Narasimhan and Vijay Laxmi and Ujjwal Kumar},
        title={Structural Fault Modelling in Nano Devices},
        proceedings={Nano-Net. Third International ICST Conference, NanoNet 2008, Boston, MA, USA, September 14-16, 2008, Revised Selected Papers},
        proceedings_a={NANO-NET},
        year={2012},
        month={5},
        keywords={Structural fault stuck-at-0 stuck-at-1 bridge MRF TMR},
        doi={10.1007/978-3-642-02427-6_2}
    }
    
  • Manoj Gaur
    Raghavendra Narasimhan
    Vijay Laxmi
    Ujjwal Kumar
    Year: 2012
    Structural Fault Modelling in Nano Devices
    NANO-NET
    Springer
    DOI: 10.1007/978-3-642-02427-6_2
Manoj Gaur1, Raghavendra Narasimhan1, Vijay Laxmi1, Ujjwal Kumar1
  • 1: Malaviya National Institute of Technology

Abstract

In this paper we present a model for structural failures in nano-devices. Fault being considered include stuck-at and bridge faults only. This model is an extension of probabilistic model based on Gibbs energy distribution and belief propagation as presented in NANOLAB [1]. Results have been carried out on a 8-bit full adder circuit. Simulation results indicate that probabilistic TMR model represents bridge and stuck-at-1 faults better while deterministic model is more suited for stuck-at-0 faults.