Research Article
Influence of Inter-channel Error Distribution on Mismatch in Time-Interleaved Pipelined A/D Converter
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@INPROCEEDINGS{10.1007/978-3-319-73447-7_58, author={Yongsheng Wang and Chen Yin and Xunzhi Zhou}, title={Influence of Inter-channel Error Distribution on Mismatch in Time-Interleaved Pipelined A/D Converter}, proceedings={Machine Learning and Intelligent Communications. Second International Conference, MLICOM 2017, Weihai, China, August 5-6, 2017, Proceedings, Part II}, proceedings_a={MLICOM}, year={2018}, month={2}, keywords={Time-Interleaved ADC Offset mismatch Gain mismatch Time sampling mismatch Channel error distribution}, doi={10.1007/978-3-319-73447-7_58} }- Yongsheng Wang
Chen Yin
Xunzhi Zhou
Year: 2018
Influence of Inter-channel Error Distribution on Mismatch in Time-Interleaved Pipelined A/D Converter
MLICOM
Springer
DOI: 10.1007/978-3-319-73447-7_58
Abstract
Influence of channel error distribution on inter-channel mismatches of pipelined time-interleaved A/D converters (TIADCs) is discussed in this paper. TIADC systems can increase the maximum sample rate, but the mismatch between the channels significantly reduce the systems’ performance. This paper analyzes the mismatch in frequency domain, and discusses the influence of amplitude distribution of the inter-channel errors on the mismatch. Finally comes to a conclusion that when the error of one channel is equal to the median of the two adjacent channel errors, them is match of the overall TIADC system is minimal. According to simulation results, it can instruct a way to reduce the mismatch of TIADCs.
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