Research Article
A 15.5 W Si-LDMOS Balanced Power Amplifier with 53% Ultimate PAE for High Speed LTE
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@INPROCEEDINGS{10.1007/978-3-319-53850-1_19, author={B. Mohammed and N. Abduljabbar and M. Al-Sadoon and K. Hameed and A. Hussaini and S. Jones and F. Elmegri and R. Clark and R. Abd-Alhameed}, title={A 15.5 W Si-LDMOS Balanced Power Amplifier with 53\% Ultimate PAE for High Speed LTE}, proceedings={Wireless and Satellite Systems. 8th International Conference, WiSATS 2016, Cardiff, UK, September 19-20, 2016, Proceedings}, proceedings_a={WISATS}, year={2017}, month={6}, keywords={Balanced power amplifier (BPA) Linearity Power added efficiency (PAE) Long term evolution (LTE) Digital pre-distortion (DPD)}, doi={10.1007/978-3-319-53850-1_19} }- B. Mohammed
N. Abduljabbar
M. Al-Sadoon
K. Hameed
A. Hussaini
S. Jones
F. Elmegri
R. Clark
R. Abd-Alhameed
Year: 2017
A 15.5 W Si-LDMOS Balanced Power Amplifier with 53% Ultimate PAE for High Speed LTE
WISATS
Springer
DOI: 10.1007/978-3-319-53850-1_19
Abstract
In this paper, a 15.5 W Si-LDMOS balanced power amplifier (PA) technique operating in the 2.620–2.690 GHz frequency band for LTE systems is presented. The amplifier was designed using large signal Si-LDMOS models, which demonstrated saturation P1dB of 41 dBm and 53% PAE. The AM-AM and AM-PM measured data of the balanced amplifier is extracted and embedded in the device under test (DUT) based on IEEE 802.16 OFDM WLAN Transceiver system. A simple linear model was design for behavioral modelling of memory-less baseband digital pre-distorter. The nonlinearity of the balanced amplifier has been compensated using the Simulink version R2011a.
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