Research Article
On the FPGA-Based Implementation of a Flexible Waveform from a High-Level Description: Application to LTE FFT Case Study
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@INPROCEEDINGS{10.1007/978-3-319-40352-6_45, author={Mai-Thanh Tran and Matthieu Gautier and Emmanuel Casseau}, title={On the FPGA-Based Implementation of a Flexible Waveform from a High-Level Description: Application to LTE FFT Case Study}, proceedings={Cognitive Radio Oriented Wireless Networks. 11th International Conference, CROWNCOM 2016, Grenoble, France, May 30 - June 1, 2016, Proceedings}, proceedings_a={CROWNCOM}, year={2016}, month={6}, keywords={High-level synthesis Software defined radio FPGA LTE Hardware implementation Design flow}, doi={10.1007/978-3-319-40352-6_45} }- Mai-Thanh Tran
Matthieu Gautier
Emmanuel Casseau
Year: 2016
On the FPGA-Based Implementation of a Flexible Waveform from a High-Level Description: Application to LTE FFT Case Study
CROWNCOM
Springer
DOI: 10.1007/978-3-319-40352-6_45
Abstract
The Field Programmable Gate Array (FPGA) technology is expected to play a key role in the development of Software Defined Radio (SDR) platforms. To this aim, leveraging the nascent High-Level Synthesis (HLS) tools, a design flow from high-level specifications to Register-Transfer Level (RTL) description can be thought to generate processing blocks that can be reconfigured at run-time. Based on such a flow, this paper describes the architectural exploration of a Fast Fourier Transform (FFT) for Long Term Evolution (LTE) standard. Synthesis results show the tradeoff between reconfiguration time and area that can be achieved with such an approach.
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