About | Contact Us | Register | Login
ProceedingsSeriesJournalsSearchEAI
Quality, Reliability, Security and Robustness in Heterogeneous Systems. 16th EAI International Conference, QShine 2020, Virtual Event, November 29–30, 2020, Proceedings

Research Article

Energy-Efficient DAC Scheme Based on Unit Capacitor Switching for SAR ADCs

Download(Requires a free EAI acccount)
4 downloads
Cite
BibTeX Plain Text
  • @INPROCEEDINGS{10.1007/978-3-030-77569-8_4,
        author={Liangbo Xie and Yan Ren},
        title={Energy-Efficient DAC Scheme Based on Unit Capacitor Switching for SAR ADCs},
        proceedings={Quality, Reliability, Security and Robustness in Heterogeneous Systems. 16th EAI International Conference, QShine 2020, Virtual Event, November 29--30, 2020, Proceedings},
        proceedings_a={QSHINE},
        year={2021},
        month={6},
        keywords={SAR ADC DAC switching scheme Energy-efficiency Unit capacitor switching Area-efficiency},
        doi={10.1007/978-3-030-77569-8_4}
    }
    
  • Liangbo Xie
    Yan Ren
    Year: 2021
    Energy-Efficient DAC Scheme Based on Unit Capacitor Switching for SAR ADCs
    QSHINE
    Springer
    DOI: 10.1007/978-3-030-77569-8_4
Liangbo Xie1,*, Yan Ren1
  • 1: School of Communication and Information Engineering
*Contact email: xielb@cqupt.edu.cn

Abstract

With the development of Internet of Things (IoTs), the number of sensor nodes is growing rapidly. These sensors are usually passive or supplied by batteries and are usually a mixed-signal circuit. Analog to digital converter (ADC) is a core element in the sensor, and the power consumption of occupies a considerable part of the whole sensor. SAR ADC is a good candidate for the sensor due to its good energy-efficiency, medium resolution and speed. As the key part of SAR ADC, digital-to-analog converter (DAC) dominates the power consumption of the SAR ADC when dynamic comparator is employed. In order to improve the energy efficiency of the DAC, this paper proposes energy-efficient DAC scheme based on unit capacitor switching. By employing a capacitor-splitting structure and introducing a third voltage reference Vqequal to a quarter of the voltage reference Vref, the unit capacitor can be employed to generate the last bit, which in turn reduces the DAC area. Simulation results show that the proposed scheme reduces the switching energy by 99.03% and the DAC area by 87.5% compared to the conventional SAR ADC structure, which achieves good energy-efficiency and area-efficiency.

Keywords
SAR ADC DAC switching scheme Energy-efficiency Unit capacitor switching Area-efficiency
Published
2021-06-02
Appears in
SpringerLink
http://dx.doi.org/10.1007/978-3-030-77569-8_4
Copyright © 2020–2025 ICST
EBSCOProQuestDBLPDOAJPortico
EAI Logo

About EAI

  • Who We Are
  • Leadership
  • Research Areas
  • Partners
  • Media Center

Community

  • Membership
  • Conference
  • Recognition
  • Sponsor Us

Publish with EAI

  • Publishing
  • Journals
  • Proceedings
  • Books
  • EUDL