Research Article
A Bufferless Non-exact Matching Hardware Accelerator for Processing Large Non-uniform Stream Data
@INPROCEEDINGS{10.1007/978-3-030-77424-0_20, author={Quang-Manh Duong and Quang-Kien Trinh and Dinh-Ha Dao and Trung-Nguyen }, title={A Bufferless Non-exact Matching Hardware Accelerator for Processing Large Non-uniform Stream Data}, proceedings={Industrial Networks and Intelligent Systems. 7th EAI International Conference, INISCOM 2021, Hanoi, Vietnam, April 22-23, 2021, Proceedings}, proceedings_a={INISCOM}, year={2021}, month={5}, keywords={FPGA accelerator Pattern matching Parallel processing Pipelined architecture}, doi={10.1007/978-3-030-77424-0_20} }- Quang-Manh Duong
Quang-Kien Trinh
Dinh-Ha Dao
Trung-Nguyen
Year: 2021
A Bufferless Non-exact Matching Hardware Accelerator for Processing Large Non-uniform Stream Data
INISCOM
Springer
DOI: 10.1007/978-3-030-77424-0_20
Abstract
Recently, problems related to big data processing are becoming more and more popular and place great demands on the processing ability of the systems. The common feature of these problems is the need to find and compare data patterns in a large input data stream in real-time. Algorithms for data processing and pattern matching have been studied for a long time, including both exact and inaccurate (non-exact) solutions, at the same time, the searching data type can be uniform or heterogeneous (non-uniform). Among the proposed data processing platforms, the solution using specialized hardware accelerators proved to be superior in performance and power consumption compared to traditional solutions that combining software and the computing power of the conventional CPUs. In this study, we proposed a bufferless non-exact matching hardware accelerator for processing large non-uniform stream data on reconfigurable hardware (FPGA) combining pipeline architecture and a parallel processing approach. We analyzed the evaluation of hardware resource utilization and the data searching speed on different hardware chips, thereby giving the optimal solution for the hardware design. Finally, we practically demonstrated a design on the Kintex 7-XC7K325T FPGA device that performs pattern matching for shaping large raw input stream data. The hardware implementation from hundreds to thousands of times faster than that on software show the high applicability of the accelerator in practice.
