Research Article
Optimized Secure Scan Flip Flop to Thwart Side Channel Attack in Crypto-Chip
@INPROCEEDINGS{10.1007/978-3-030-15357-1_34, author={Sivasankaran Saravanan and Mikias Hailu and G. Gouse and Mohan Lavanya and R. Vijaysai}, title={Optimized Secure Scan Flip Flop to Thwart Side Channel Attack in Crypto-Chip}, proceedings={Advances of Science and Technology. 6th EAI International Conference, ICAST 2018, Bahir Dar, Ethiopia, October 5-7, 2018, Proceedings}, proceedings_a={ICAST}, year={2019}, month={3}, keywords={Cryptography algorithms Side channel attack Secure testing Crypto chips}, doi={10.1007/978-3-030-15357-1_34} }- Sivasankaran Saravanan
Mikias Hailu
G. Gouse
Mohan Lavanya
R. Vijaysai
Year: 2019
Optimized Secure Scan Flip Flop to Thwart Side Channel Attack in Crypto-Chip
ICAST
Springer
DOI: 10.1007/978-3-030-15357-1_34
Abstract
Present crypto based smart systems very popular for secure application. But all this system was targeted by various threats, malfunctions, hacking and side channel attack. Cryptography algorithm will try to give secure in data encryption and decryption but failed in direct hardware implementation. This paper provides an optimized secure testing method against side channel attack in crypto chips. This proposed system reduces the switching activity in latches and also reduces the power consumption in architecture. It avoids unwanted latches to obtain optimization in area by random insertion of scan chain design. This optimized architecture was targeted to RSA crypto algorithm to show the effectiveness of the proposed method over various existing methods.
