5th International ICST Conference on Communications and Networking in China

Research Article

Serial RapidIO robustness enhancement scheme

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  • @INPROCEEDINGS{10.4108/chinacom.2010.55,
    author={Yong Zhang and Yong Wang and Ping Zhang and Kai Sun},
    title={Serial RapidIO robustness enhancement scheme},
    proceedings={5th International ICST Conference on Communications and Networking in China},
    publisher={IEEE},
    proceedings_a={CHINACOM},
    year={2011},
    month={1},
    keywords={Bit error rate Conferences Delay Receivers Robustness Throughput Transmitters},
    doi={10.4108/chinacom.2010.55}
}
  • Yong Zhang
    Yong Wang
    Ping Zhang
    Kai Sun
    Year: 2011
    Serial RapidIO robustness enhancement scheme
    CHINACOM
    ICST
    DOI: 10.4108/chinacom.2010.55
Yong Zhang1,2,*, Yong Wang1,2, Ping Zhang1,2, Kai Sun3
  • 1: Wireless Technology Innovation Institute
  • 2: Key Laboratory of Universal Wireless Communication, Ministry of Education, Beijing University of Posts and Telecommunications, Beijing 100876, P. R. China
  • 3: College of Electronic Information Engineering, Inner Mongolia University, Hohhot 010021, P. R. China
*Contact email: xiazibin@gmail.com

Abstract

Robustness enhancement scheme in Serial RapidIO (SRIO) interconnect is proposed to overcome the performance degradation caused by noise and Electromagnetic Interference (EMI). The main idea of this scheme is the adaptive speed transition and mode conversion. Adaptive speed transition can improve average throughput and reduce delay in high Bit Error Rate (BER) environment. Mode conversion is to conquer frequent usage of feedback channel. Simulation shows that the scheme of combining adaptive speed transition with mode conversion leads great performance enhancement in SRIO network.

Keywords
Bit error rate Conferences Delay Receivers Robustness Throughput Transmitters
Published
2011-01-10
Publisher
IEEE
http://dx.doi.org/10.4108/chinacom.2010.55
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