Research Article
NoC architecture with Local Bus Design for Network Coding
@INPROCEEDINGS{10.1109/ChinaCom.2011.6158330, author={Jianhao Hu}, title={NoC architecture with Local Bus Design for Network Coding}, proceedings={The 1st International ICST Workshop on Network Coding in Wireless Relay Network}, publisher={IEEE}, proceedings_a={NRN}, year={2012}, month={3}, keywords={network on chip; throughput; local bus; network coding}, doi={10.1109/ChinaCom.2011.6158330} }- Jianhao Hu
Year: 2012
NoC architecture with Local Bus Design for Network Coding
NRN
IEEE
DOI: 10.1109/ChinaCom.2011.6158330
Abstract
A novel Network on Chip (NoC) architecture based on local bus to achieve high efficient multicast and broadcast data transmission is proposed in this paper. The Network Coding (NC) is adopted in the proposed architecture. Compared with the traditional NoC design, the proposed NoC architecture can improve the data throughput and decrease the hardware complexity. In the proposed architecture the process elements are connected with the logical network, which is established with interconnected local mono-direction buses. The proposed architecture inherits the advantages both bus and traditional NoC, and provides the possibility for NC. From the analysis and case studies, we find that the proposed architecture can enhance the performance of NoC with NC.
