Research Article
Phase Noise Analysis of PLL Based Frequency Synthesizers for Multi-Radio Mobile Terminals
@INPROCEEDINGS{10.1109/CROWNCOM.2008.4562555, author={V\^{a}clav VALENTA and Genevi\'{e}ve BAUDOIN and Martine VILLEGAS}, title={Phase Noise Analysis of PLL Based Frequency Synthesizers for Multi-Radio Mobile Terminals}, proceedings={3rd International ICST Conference on Cognitive Radio Oriented Wireless Networks and Communications}, publisher={IEEE}, proceedings_a={CROWNCOM}, year={2008}, month={7}, keywords={frequency synthesis; phase locked loop; phase noise; cognitive radio; multi-radio}, doi={10.1109/CROWNCOM.2008.4562555} }
- Václav VALENTA
Geneviève BAUDOIN
Martine VILLEGAS
Year: 2008
Phase Noise Analysis of PLL Based Frequency Synthesizers for Multi-Radio Mobile Terminals
CROWNCOM
IEEE
DOI: 10.1109/CROWNCOM.2008.4562555
Abstract
This paper deals with phase noise analysis and design aspects of PLL based frequency synthesizers for cognitive multi-radio mobile terminals. Principal features of PLL based frequency synthesizers are presented and simulated. This document describes various issues of the loop filter design and the overall impact on the frequency synthesizer performance in terms of the phase noise, settling time and the spurious suppression capability. Phase noise requirements for main communication standards in the frequency band 800 MHz to 6 GHz are investigated as well.
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