Nano-Net. 4th International ICST Conference, Nano-Net 2009, Lucerne, Switzerland, October 18-20, 2009. Proceedings

Research Article

Functional Model of Carbon Nanotube Programmable Resistors for Hybrid Nano/CMOS Circuit Design

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  • @INPROCEEDINGS{10.1007/978-3-642-04850-0_16,
        author={Weisheng Zhao and Guillaume Agnus and Vincent Derycke and Ariana Filoramo and Christian Gamrat and Jean-Philippe Bourgoin},
        title={Functional Model of Carbon Nanotube Programmable Resistors for Hybrid Nano/CMOS Circuit Design},
        proceedings={Nano-Net. 4th International ICST Conference, Nano-Net 2009, Lucerne, Switzerland, October 18-20, 2009. Proceedings},
        proceedings_a={NANO-NET},
        year={2012},
        month={5},
        keywords={Functional Modelling Carbon Nanotube Hybrid Nano/CMOS circuits OG-CNTFET Verilog-A},
        doi={10.1007/978-3-642-04850-0_16}
    }
    
  • Weisheng Zhao
    Guillaume Agnus
    Vincent Derycke
    Ariana Filoramo
    Christian Gamrat
    Jean-Philippe Bourgoin
    Year: 2012
    Functional Model of Carbon Nanotube Programmable Resistors for Hybrid Nano/CMOS Circuit Design
    NANO-NET
    Springer
    DOI: 10.1007/978-3-642-04850-0_16
Weisheng Zhao1,*, Guillaume Agnus2,*, Vincent Derycke2,*, Ariana Filoramo2,*, Christian Gamrat1,*, Jean-Philippe Bourgoin2,*
  • 1: CEA LIST
  • 2: CEA, IRAMIS
*Contact email: weisheng.zhao@cea.fr, guillaume.agnus@cea.fr, vincent.derycke@cea.fr, ariana.filoramo@cea.fr, christian.gamrat@cea.fr, jean-philipe.bourgoin@cea.fr

Abstract

Hybrid Nano (e.g. Nanotube and Nanowire) /CMOS circuits combine both the advantages of Nano-devices and CMOS technologies; they have thus become the most promising candidates to relax the intrinsic drawbacks of CMOS circuits beyond Moore’s law. A functional simulation model for an hybrid Nano/CMOS design is presented in this paper. It is based on Optically Gated Carbon NanoTube Field Effect Transistors (OG-CNTFET), which can be used as 2-terminal programmable resistors. Their resistance can be adjusted precisely, reproducibly and in a non-volatile way, over three orders of magnitude. These interesting behaviors of OG-CNTFET promise great potential for developing the non-volatile memory and neuromorphic adaptive computing circuits. The model is developed in Verilog-A language and implemented on Cadence Virtuoso platform with Spectre 5.1.41 simulator. Many experimental parameters are included in this model to improve the simulation accuracy.