Nano-Net. 4th International ICST Conference, Nano-Net 2009, Lucerne, Switzerland, October 18-20, 2009. Proceedings

Research Article

Can SG-FET Replace FET in Sleep Mode Circuits?

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  • @INPROCEEDINGS{10.1007/978-3-642-04850-0_15,
        author={Marius Enachescu and Sorin Cotofana and Arjan Genderen and Dimitrios Tsamados and Adrian Ionescu},
        title={Can SG-FET Replace FET in Sleep Mode Circuits?},
        proceedings={Nano-Net. 4th International ICST Conference, Nano-Net 2009, Lucerne, Switzerland, October 18-20, 2009. Proceedings},
        proceedings_a={NANO-NET},
        year={2012},
        month={5},
        keywords={SG-FET power gating sleep transistor},
        doi={10.1007/978-3-642-04850-0_15}
    }
    
  • Marius Enachescu
    Sorin Cotofana
    Arjan Genderen
    Dimitrios Tsamados
    Adrian Ionescu
    Year: 2012
    Can SG-FET Replace FET in Sleep Mode Circuits?
    NANO-NET
    Springer
    DOI: 10.1007/978-3-642-04850-0_15
Marius Enachescu1,*, Sorin Cotofana1,*, Arjan Genderen1,*, Dimitrios Tsamados2,*, Adrian Ionescu2,*
  • 1: Delft University of Technology
  • 2: Ecole Polytechnique Fédérale de Lausanne
*Contact email: mariuse@ce.et.tudelft.nl, sorin@ce.et.tudelft.nl, arjan@ce.et.tudelft.nl, dimitris.tsamados@epfl.ch, adrian.ionescu@epfl.ch

Abstract

The Suspended Gate Field Effect Transistor (SG-FET) appears to have the potential to replace traditional FETs in sleep mode circuits, due to its abrupt switching enabled by electromechanical instability at a certain threshold voltage and its ultra low “off” current( ). This paper presents a preliminary assessment of the SG-FET potential if utilized as sleep transistor in real applications, e.g., microprocessors. We first evaluate various SG-FET instances in terms of switching delay, current capability, and leakage. Subsequently, we compare these figures with the ones offered by traditional switch transistors utilized in CMOS technologies. Our simulation results indicate that SG-FET based sleep mode circuits are potentially interesting as they clearly enable substantial leakage reductions due to their extremely low “off” currents (4 orders of magnitude lower than FET) at the expense of a x larger active area for the same capability to drive current.