• Nanoscale Data Storage Devices Capacity and Encoding Schemes

  • Future Trends on Nanoantennas Synthesis

  • A Theoretical Framework for On-chip Stochastic Communication Analysis

  • Routing Aware Switch Hardware Customization for Networks on Chips

  • 3D on-chip networking technology based on post-silicon devices for future networks-on-chip

  • Controlled nanowire fabrication by PEDAL process

  • Self-Assembled Networks: Control vs. Complexity

  • A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects

  • On-Chip Interconnects and Repeaters Based on NiSi Nanowire

  • Modeling and Evaluating Carbon Nanotube Bundles for Future VLSI Interconnect Applications