• Self-Assembled Networks: Control vs. Complexity

  • A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects

  • On-Chip Interconnects and Repeaters Based on NiSi Nanowire

  • Modeling and Evaluating Carbon Nanotube Bundles for Future VLSI Interconnect Applications

  • The State of ZettaRAM

  • Connecting and Configuring Defective Nano-Scale Networks for DNA Self-Assembly

  • A Low Cost Network-on-Chip with Guaranteed Service Well Suited to the GALS Approach

  • Can Carbon Nanotubes Extend the Lifetime of On-Chip Electrical Interconnections?

  • Skew Insensitive Physical Links for Network on Chip

  • Predictive Technology Model for Nano-CMOS Design Exploration