R eview of N etwork on C hip R outing A lgorithms

System on chip (SoC) is an integrated circuit in which components are communicating through the bus interconnection system. Network on chip (NoC) is a communication network for a multiprocessor system on chip (MPSoC). In NoC architecture node/ component of MPSOC are communicating through a network. The performance of NoC architecture depends on topology, routing algorithm and switching technique. In this paper, different NoC routing algorithms are review using basic parameters of NoC architecture and also provide some information about these parameters. It is concluded that most of the researchers are interested in design of the NoC routing algorithm, which efficiently transmits data from source to destination. When the routing algorithm is congestion aware, fault-tolerant, deadlock-free and live-lock free, then the latency of algorithm decreases and throughput increases.


Contemplation on the routing algorithm
Every routing algorithm has a different impact on different NoC architecture. It affects different properties of NoC architecture such as latency, throughput and power consumption.
The routing algorithm is similar to routing in any network. Routing algorithm decides path followed by a packet in communication from source to destination [1,12,13]. They prevent deadlock, live-lock and starvation situation. Deadlock is cyclic dependency among node making access to resources where no progress can be made. Live-lock as refers to a situation where packet circulates in the network but not reaching to the destination. In starvation packet in buffer request for output channel but output channel also allocated to another packet [1].

Routing type
Different types of routing algorithms are developed for the designing of NOC. Routing algorithms are classified on three key characteristics. Which are routing decision, defining path and path length [1,12]. On the base of the routing decision, there are two types of source and distributed routing. In source, routing path defines by source router and in distributed routing, each router decides the next direction for packet [1]. According to path defining or adaptively, the routing algorithm has two type deterministic and adaptive algorithms. The path is completely determined from source to destination in advance in the deterministic algorithm. There also as another type partially adaptive which restrict some direction [13]. On the base of path length, there are two types minimal and non-minimal. Shortest path selection algorithm is minimal and the longest path selection algorithm is non-minimal [1,13].

Topology
Topology in NoC is an organisation of router and channel. Topology is the roadmap for communication of PE in NoC [35]. It's divide into two types [10]. In regular topology, nodes are connected in a specific pattern. Mesh, torus, star, EAI Endorsed Transactions on Context-aware Systems and Applications 09 2020 -12 2020 | Volume 7 | Issue 22 | e5 ring and tree are popular regular topology [10,[35][36][37][38]. The mash topology has M rows and N columns. The intersection of row and column consists of routers and the router are connected to its neighbours. Tours topology are similar to mesh but end routers are connected together with the same row and column routers. In star topology, all routers are connected to a central router. The router is connected to its two neighbours circle shape are ring topology. In tree topology, a child router is connected to its parent router. Fig  (3-6) shows the structure of torus, star, ring and tree topology. In irregular, topology nodes are not connected in fix pattern. Fig (7) shows irregular topology. To design the routing algorithm for the network, the choosing of topology is the principle step. The performance of the routing algorithm depends on the topology on which it's implemented and also on the number of routers in the topology. When the same algorithm is implemented on mesh 4×4, and mesh 8×8 have different performance [28]. O1TURN [39], DyXY [16], BARP [18] and FT-XY [33] are implemented on mesh topology having a different number of the router. In this review, Table 1 shows that most of the routing algorithm is implemented on a mesh topology.

Switching Technique
Switching technique refers to the flow control mechanism of messages between routers. The basic switching techniques that are used in NoC is circuit switching and packet switching. Packet switching is further divided into three broad categories wormhole, store and forward and virtual cut through [10,54]. In the wormhole, the packet is divided into flit (head flit, body flit and tail flit). Head flit contains source and destination information, body flit contains data which is transmitted to destination and tail flit contain ending information of flit. Due to the pipelined nature of wormhole, it redacts message latency [31,54,55]. In store and forward technique, the whole packet is store in the router then routed to the next router. In virtual cut through, the packet is forwarded to the next router if it ensures that the whole packet is store in it [10,54]. Due to pipeline nature and low latency wormhole switching technique are preferring in designing of routing algorithm. The GAL, DyAD, BARP, MaS, Preconcerted wormhole routing, DTRL and Link sharing are implemented using wormhole switching technique [15,18,19,31,47,49,50].

Congestion Awareness
It's characteristic of routing algorithm which improves the performance of NoC by distributing the load over network EAI Endorsed Transactions on Context-aware Systems and Applications 09 2020 -12 2020 | Volume 7 | Issue 22 | e5

Review of Network on Chip Routing Algorithms
Khurshid Ahmad, Muhammad Athar Javed Sethi 8 and send the traffic over the less congested area. On congestion awareness basis routing algorithm are divided into two types. Congestion oblivious algorithm and congestion aware algorithm [46,56]. Congestion oblivious algorithm is unable to balance the load over the network and can't consider the congestion status of the network. Without congestion awareness interconnection system of the network is unbalanced and burst. On the other hand, the congestion aware algorithm routes the traffic through the largest available virtual channel. Table 1 show that GAL, DyAD, DyXY, BARP, EDXY, FA-DyAD, CATRA, Free-Rider, Novel adaptive routing, DTRL, MCAR, Adaptive multipath, Link sharing and CFPA are congestion aware algorithms [15,16,20,22,27,28,31,32,44,46,50,52,53]. Congestion awareness decrees latency and increases throughput. Congestion aware algorithms are further divided on the base of sharing of congestion information are local and non-local [22].

Fault tolerance
Fault tolerance is network property to examine the functioning of the network component and remains its functioning when some components are inactive/faulty. Fault can occur as a result of a defect in the system, improper environment and improper design of a system. Fault in NoC is categories in two groups on the base of time and occurrence. Hardware fault occurs due to hardware fault of the system and for its removing extra hardware or resources are required [57][58][59]. The soft fault is denoted by a bug in the software and it can be addressed by routing algorithm.

Power Dissipation
In the designing of the routing algorithm, the power dissipation is under consideration of scientists and researchers. Power dissipation is divide into two parts; static and dynamic. Static power relates to manufacturing technology and dynamic power depends on the router activity [61]. In [62][63][64][65][66] are the technique are proposed to reduce power consumption.
The power consumption of FT-XY under uniform traffic of 4×4 NoC is .01 to .09 J and for 6×6 NoC its .02 to .09 J for injection rate of .005 to .019 packet/cycle/node [33]. The power consumption for ADBR is .00035J, for MaS algorithm it's a 6.5w at injection rate of 0.21 packet/cycle/node, for Traffic allocation routing algorithm it's 61.973mw when load is 50%, for ZigZig algorithm it's 62.698mw when load is 50% and for Link sharing algorithm it's 2.86mw [17,19,24,34,50].

Latency and Throughput
The performance of the routing algorithm depends on latency and throughput. The performance of routing is batter when its latency is low, and throughput is high. Most of the researchers compare their own proposed routing algorithm latency and throughput with other routing algorithms for performance evaluation. Throughput of CFPA is compared with XY and DyAD and shown that its throughput is better than XY and DyAD [53].
The latency and throughput of routing algorithm depend on the number of tiles in NoC, e.g. for same algorithm latency and throughput for 4×4 and 8×8 are different. When the number of tiles in NoC increases the latency of routing algorithm increase and throughput is decrees [23,28,34,44]. Latency and throughput of routing algorithm also depend on the injection rate [16,18,32,40]. Latency and throughput of the review routing algorithms are shown in Table 1.

Simulator
There are three approaches for the to evaluate the performance of the system • Actual system monitoring • Mathematical modelling • Simulation modelling The simulation environment provides an extensible framework for NoC evaluation and provides more feature, different topology, swathing technique, routing algorithm, flow control polices and high accuracy [67][68][69].
In this review, Table 1 shows most of the routing algorithm performance is evaluated on Noxim, Booksim and NIGRAM simulator. Noxim simulator is used for the performance evaluation of ADBR, FT-XY, FAFT routing algorithm, Novel adaptive routing, Efficient deadlock-free adaptive routing and 3DEP. Booksim simulator is used for FT-DyXY, free-rider and MCAR. Precocerted wormhole routing, traffic allocation routing and ZigZig routing algorithm performance are evaluated through NIGRAM simulator. Some other simulator Event-driven, XMultar, PopNET, gpNoCsim, OpNET, Matlab simulator and eventdriven are used for performance evaluation of routing algorithms.

Conclusion
This paper review different routing algorithm of NoC on the base of different parameter. In our view, it's helpful for the researcher community to find and resolve the unanswered issue of this area. Based on Table 1, it is concluded that most of the researchers are interested in to design the routing algorithm, which has low latency, high throughput, low power consumption, congestion aware and faulttolerant. From this review it is concluded that, in the designing of routing algorithm the designers/researchers should compromise on some parameters. When the EAI Endorsed Transactions on Context-aware Systems and Applications 09 2020 -12 2020 | Volume 7 | Issue 22 | e5 9 algorithm is congestion aware, fault-tolerant, dead lock free and live-lock free than power consumption, area utilisation and some other parameter like processing are increase but the latency is decrease and throughput is increase.