Research Article
A cycle-count-accurate simulation platform with enhanced design exploration capability
@INPROCEEDINGS{10.4108/icst.simutools.2012.247809, author={Oana Boncalo and Alin Dobre and Alexandru Amaricai and Andrei Tanase}, title={A cycle-count-accurate simulation platform with enhanced design exploration capability}, proceedings={Fifth International Conference on Simulation Tools and Techniques}, publisher={ICST}, proceedings_a={SIMUTOOLS}, year={2012}, month={6}, keywords={multi-core cycle-count-accurate simulator performance analysis architecture exploration}, doi={10.4108/icst.simutools.2012.247809} }- Oana Boncalo
Alin Dobre
Alexandru Amaricai
Andrei Tanase
Year: 2012
A cycle-count-accurate simulation platform with enhanced design exploration capability
SIMUTOOLS
ICST
DOI: 10.4108/icst.simutools.2012.247809
Abstract
This paper presents a simulation platform for architecture exploration of bus based heterogeneous multi-processor system-on chips (MPSoC) – moviSim. The tradeoff between accurate simulation results and simulation time has been obtained by the cycle-count-accurate approach. Its main attributes are: flexibility, integration with the targeted tool chain and increased tracing and analysis capability. The wide range of implemented metrics (program execution time, executed instructions, stalled cycles, bus logging, register and memory port detection, power consumption, function, data and code line profiling, cache metrics (miss/hit ratio, etc), number of memory/subsystem reads/writes performed by a master) allow enhanced architectural exploration capability for complex MPSoC on which large software applications are running. Due to easy integration with debugging tools, the source code targeting the hardware platform can be easily verified and analyzed with the proposed simulation platform.