Fifth International Conference on Simulation Tools and Techniques

Research Article

Instruction-Based Energy Estimation Methodology for Asymmetric Manycore Processor Simulations

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  • @INPROCEEDINGS{10.4108/icst.simutools.2012.247770,
        author={William Song and Sudhakar Yalamanchili and Saibal Mukhopadhyay and Arun Rodrigues},
        title={Instruction-Based Energy Estimation Methodology for Asymmetric Manycore Processor Simulations},
        proceedings={Fifth International Conference on Simulation Tools and Techniques},
        publisher={ICST},
        proceedings_a={SIMUTOOLS},
        year={2012},
        month={6},
        keywords={energy estimation},
        doi={10.4108/icst.simutools.2012.247770}
    }
    
  • William Song
    Sudhakar Yalamanchili
    Saibal Mukhopadhyay
    Arun Rodrigues
    Year: 2012
    Instruction-Based Energy Estimation Methodology for Asymmetric Manycore Processor Simulations
    SIMUTOOLS
    ICST
    DOI: 10.4108/icst.simutools.2012.247770
William Song,*, Sudhakar Yalamanchili1, Saibal Mukhopadhyay1, Arun Rodrigues2
  • 1: Georgia Institute of Technology
  • 2: Sandia National Labs
*Contact email: wjhsong@gatech.edu

Abstract

Processor power is a complex function of device, packaging, microarchitecture, and application. Typical approaches to power simulation require detailed microarchitecture models to collect the statistical switching activity counts of processor components. In manycore simulations, the detailed core models are the main simulation speed bottleneck. In this paper, we propose an instruction-based energy estimation model for fast and scalable energy simulation. Importantly, in this approach the dynamic energy is modeled as a combination of three contributing factors: physical, microarchitectural, and workload properties. The model easily incorporates variations in physical parameters such as clock frequencies and supply voltages. When compared to commonly used cycle-level microarchitectural simulation approach with SPEC2006 benchmarks, the proposed instruction-based energy model incurred a 2.94% average error rate while achieving an average simulation time speedup of 74X for a 16-core asymmetric x86 ISA processor model with multiple clock domains operating at different frequencies.