2nd International ICST Conference on Body Area Networks

Research Article

SpotCore: a power-efficient embedded processor for intelligent sensor networks

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  • @INPROCEEDINGS{10.4108/bodynets.2007.151,
        author={Mbou Eyole-Monono and Robert Harle and Andrew Rose},
        title={SpotCore: a power-efficient embedded processor for intelligent sensor networks},
        proceedings={2nd International ICST Conference on Body Area Networks},
        publisher={ICST},
        proceedings_a={BODYNETS},
        year={2007},
        month={6},
        keywords={Low-power Sensor networks Microprocessors Embedded systems Threads Schedulers},
        doi={10.4108/bodynets.2007.151}
    }
    
  • Mbou Eyole-Monono
    Robert Harle
    Andrew Rose
    Year: 2007
    SpotCore: a power-efficient embedded processor for intelligent sensor networks
    BODYNETS
    ICST
    DOI: 10.4108/bodynets.2007.151
Mbou Eyole-Monono1,*, Robert Harle1,*, Andrew Rose2,*
  • 1: University of Cambridge Computer Laboratory 15 JJ Thomson Avenue Cambridge CB3 0FD, UK
  • 2: ARM Ltd. Processor Division 110 Fulbourn Road Cambridge CB1 9NJ, UK
*Contact email: me265@cam.ac.uk, rkh23@cam.ac.uk, Andrew.Rose@arm.com

Abstract

Sensor platforms designed with mobility in mind, such as body networks, have inherent scalability problems arising from the conflicting demand for high processing capabilities (to collect, compress, and filter data) and the need for low-power, resource-constrained hardware. This paper presents a CPU design which seeks to optimize processing for a sensor network by improving performance in a power-efficient and scalable manner. We demonstrate the crucial design decisions and trade-offs required in developing such a processing platform and demonstrate that a minimalist design saves power without adverse impact on performance. In addition, we address the problem of scalability in a multithreaded environment through the development of a novel scheduling algorithm implemented directly in hardware.